Serial Peripheral Interface(SPI)is more popular than the traditional x8 or x16 parallel architecture because of its extremely low pin occupancy and increasing data throughput.SPI has developed from single data line to four data lines(i.e.four channels/Quad SPI),which can provide data bandwidth of more than 50mB/s..At present,SPI has become a mature and popular interface standard in microcontroller and microprocessor systems.Everspin's single I/O SPI MRAM series has been widely used in smart meters and various embedded devices.However,for high-performance scenarios such as next-generation RAID controllers,server system logs,and storage device buffers,the single channel speed of 40MHz obviously has bottlenecks.
 

Everspin introduced a four-channel I/O SPI MRAM with a capacity of 1Mb,with a reading and writing speed of 52MB/s,which can fully meet the real-time data access requirements of high-performance applications.As a non-volatile memory,serial MRAM MR10Q010 has a data retention time of more than 20 years,and has both the high-speed random access ability like SRAM and the power-off retention characteristics of Flash,which is very suitable for data storage and program code storage in embedded systems.
 

Everspin serial MRAM MR10Q010 chip is powered by 3.3V VDD,but its I/O interface is specially designed for 1.8V bus environment.This means that when SPI serial MRAM is connected to 3.3V data bus,it can be seamlessly connected by only one level shifter.This flexible voltage adaptation feature allows engineers to directly upgrade the storage performance without greatly modifying the existing system.
 

Everspin MR10Q010 supports four peripheral interface(QPI)mode.This mode significantly reduces the protocol overhead in the instruction loading process,thus effectively improving the system throughput in the XIP(local execution)environment.This makes serial MRAM chips very attractive in embedded applications that need to store program codes in external memory.The combination of QPI mode and four-channel SPI instruction can give full play to the effective clock frequency advantage of the memory,and finally make the overall performance of Everspin four-channel SPI MRAM surpass the traditional asynchronous parallel memory.